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VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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DOCUMENT REVISION HISTORY 1: DOCUMENT REVISION FROM TO A DATE 2004.03.16 DESCRIPTION First Release. Based on a.) Test Specification: VL-TS-MDLS12433P-XX Rev. B 2003-08-26. b.) VL-QUA-012A-S, REV. P, APR/2003 (English version). According to VL-QUA-012A-S, LCD size is small because Unit Per Laminate=21 which is more than 6pcs/Laminate. CHANGED BY CHEN HUI JUAN CHECKED BY SUNNY LEE
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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CONTENTS
Page No. 1. 2. 3. 3.1 3.2 4. 4.1 4.2 4.3 5. GENERAL DESCRIPTION MECHANICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS (Ta=25C) ENVIRONMENTAL CONDITION ELECTRICAL SPECIFICATIONS INTERFACE SIGNALS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS LCD COSMETIC CONDITIONS 4 4 6 6 6 7 7 7 8 10
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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VARITRONIX LIMITED
Specification of LCD Module Type Item No.: MDLS12433P-01
1. General Description * * * * * * * 2. 12 characters x 4 lines (5 x 8 dots) STN Positive Silver Reflective LCD character module. Driving scheme: 1:32 multiplexed drive, 1/6 bias. Optimal view direction: 6 O'clock. `PHILIPS' PCF2116AU/10 die form LCD controller / driver. Data interface: I2C-bus. Built in character generator with the standard character set. Flexible Flat Cable (FFC) (length=70mm).
Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 Parameter Outline dimensions Viewing area Display format Character size Character spacing Character pitch Dot size Dot spacing Dot pitch Weight: Specifications 49.0(W) x 44.0(H) x 2.0 max.(D) (Excluded FFC and RTV). 49.0(W) x 108.5(H) x 2.0 max.(D) (Included FFC. Excluded RTV). 41.0(W) x 19.1(H) 12 characters X 4 lines (5 x 8 dots) 2.05(W) x 3.55(H) (5 x 8 dots) 0.96(W) x 0.96(H) 3.01(W) x 4.51(H) 0.37(W) x 0.40(H) 0.05(W) x 0.05(H) 0.42(W) x 0.45(H) TBD Unit mm mm mm mm mm mm mm mm grams
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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Figure 1: Specification Drawing
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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3. 3.1
Absolute Maximum Ratings Electrical Maximum Ratings (Ta = 25 C) Table 2
Parameter Condition Symbol Min. Max. Power supply voltage (Logic) VCC - GND -0.5 +8.0 Power supply voltage (LCD) VLCD 0 11.0 Input voltage range OSC,SCL,SDA Vin GND-0.50 VCC +0.5 Note: The modules may be destroyed if they are used beyond the absolute maximum ratings. All voltage values are referenced to GND = 0V.
Unit V V V
3.2
Environmental Condition Table 3 Operating Storage Temperature Temperature (Topr) (Tstg) Min. Max. Min. Max. 0C +50C -10C +60C 95% max. RH for Ta 40C < 95% RH for Ta > 40C Frequency: 10 55 Hz Amplitude: 0.75 mm Duration: 20 cycles in each direction. Pulse duration : 11 ms 2 Peak acceleration: 981 m/s = 100g Number of shocks : 3 shocks in 3 mutually perpendicular axes.
Item Ambient Temperature Humidity Vibration (IEC 68-2-6) cells must be mounted on a suitable connector Shock (IEC 68-2-27) Half-sine pulse shape
Remark Dry no condensation 3 directions 3 directions
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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4. 4.1
Electrical Specifications Interface signals Table 4 Symbol GND VCC V0 SDA SCL Description Ground (0V) and cathode of LED backlight. Power supply for logic (+5V). Control input for VLCD. I2C serial data input/output. I2C serial clock input.
Pin No. 1 2 3 4 5
4.2
Typical Electrical Characteristics Ta = 25 C,VCC = 5.0V 5%,GND=0V. Conditions: GND=0V, VCC=VCC(typ.), Tamb=+25C, Vop=Vop(typ.), Rosc=Rosc(typ.), unless otherwise stated. Table 5
Symbol VCC-GND VLCD =VCC-V0 Input signal voltage low Vil Input signal voltage Vih high LCD operating current ICC
Parameter Supply voltage (Logic) Supply voltage (LCD)
Conditions Note 1
Min. 4.75 3.0 GND 0.9 VCC
Typ. 5.00 3.3 0.4 0.5
Max. 5.25 3.6 0.1 VCC VCC 0.6 0.8
Unit V V V V mA mA
Character mode, Note 1 Checker board mode, Note 1
-
Note 1:
There is tolerance in optimum LCD driving voltage during production and it will be within the specified range.
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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4.3
Timing Specifications
Ta = 0 C to +50 C, VCC =5V5%, GND=0V; VLCD= VCC-3.5V to VCC-9V. Refer to Fig.2, I2C Bus Timing Diagram of 'PHILIPS' PCF2116; rise and fall times referring to VIL and VIH. Table 6 Parameters LCD frame frequency (internal clock) (note 1) External clock frequency Timing characteristics: I2C-bus interface; note 2 SCL clock frequency Tolerable spike width on bus Bus free time Set-up time for a repeated START condition Start condition hold time SCL LOW time SCL HIGH time SCL and SDA rise time SCL and SDA fall time Data set-up time Data hold time Set-up time for Stop condition Notes: 1 VCC=5.0V. 2. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to VIL and VIH with an input voltage swing to GND to VCC. Symbol fFR fOSC fSCL tSW tBUF tSU;STA tHD;STA tLOW tHIGH tr tf tSU;DAT tHD;DAT tSU;STO Min. 40 90 4.7 4.7 4 4.7 4 250 0 4 Typ. 65 150 Max. 100 225 100 100 1 0.3 Unit Hz kHz kHz ns s s s s s s s ns ns s
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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Figure 2: I2C Bus Timing Diagram of `PHILIPS' PCF2116; rise and fall times referring to VIL and VIH
VL-FS-MDLS12433P-01 REV. A (MDLS12433P-LV-S) MAR/2004
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5.
LCD Cosmetic Conditions Refer to VL-QUA-012A-S.
"Varitronix Limited reserves the right to change this specification." FAX:(852) 2343-9555. URL:http://www.varitronix.com - END -

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